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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-10-15 17:19:41 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-01-15 15:29:52 +0100 |
commit | cb08e169cf959333206ef69d8aa82808ef797eb7 (patch) | |
tree | f025f6d243e815821ae70d8febbdb415025d7dfa /src/northbridge/intel/haswell/Makefile.inc | |
parent | bbf013c38fe76cf9cc107c41c17e4ac432847d28 (diff) | |
download | coreboot-cb08e169cf959333206ef69d8aa82808ef797eb7.tar.xz |
CBMEM intel: Define get_top_of_ram() once per chipset
Only have one definition of get_top_of_ram() function and compile
it using __SIMPLE_DEVICE__ for both romstage and ramstage.
Implemented like this on intel/northbridge/gm45 already.
This also adds get_top_of_ram() to i945 ramstage.
Change-Id: Ia82cf6e47a4c929223ea3d8f233d606e6f5bf2f1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3993
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/intel/haswell/Makefile.inc')
-rw-r--r-- | src/northbridge/intel/haswell/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index 04b0d2fc7f..bf7daa706a 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -17,6 +17,7 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c @@ -24,6 +25,7 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c ramstage-y += mrccache.c ramstage-y += minihd.c +romstage-y += ram_calc.c romstage-y += raminit.c romstage-y += mrccache.c romstage-y += early_init.c |