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| author | Iru Cai <mytbk920423@gmail.com> | 2020-04-05 00:04:45 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2020-04-05 00:04:45 +0800 |
| commit | ad1a8b5aca9ca1be677b7e5935e8d9d0a78df3a1 (patch) | |
| tree | 5b91ecb2650b9b0d61a41fb0cca79763c7393896 /src/northbridge/intel/haswell/mrc_misc.h | |
| parent | 38492900e1b7059b00229e959dc7e5c9367dccd5 (diff) | |
| download | coreboot-ad1a8b5aca9ca1be677b7e5935e8d9d0a78df3a1.tar.xz | |
rename some functions from MRC code
Diffstat (limited to 'src/northbridge/intel/haswell/mrc_misc.h')
| -rw-r--r-- | src/northbridge/intel/haswell/mrc_misc.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/mrc_misc.h b/src/northbridge/intel/haswell/mrc_misc.h index ecd12aa7ef..37ca1ec67d 100644 --- a/src/northbridge/intel/haswell/mrc_misc.h +++ b/src/northbridge/intel/haswell/mrc_misc.h @@ -12,8 +12,8 @@ uint64_t MRCABI fcn_fffb5038(void *ram_data,uint32_t *param_2,uint8_t *param_3,uint32_t *param_4); uint64_t udiv64(uint64_t, uint64_t); -int fcn_fffaa6af(void *ram_data); -int fcn_fffa78a0(void *ramdata); +int MrcRestoreNonTrainingValues(void *ram_data); +int MrcMcCapabilityPreSpd(void *ramdata); typedef int (*callback_t)(void *); typedef int (*callback3_t)(void *, void *, void *); @@ -53,7 +53,7 @@ DECL_CB1(fcn_fffb7c94); DECL_CB1(fcn_fffb7acc); DECL_CB1(fcn_fffb7866); -int fcn_fffb8689(void *ramdata); +int MrcSpdProcessing(void *ramdata); int fcn_fffa7a1c(void *ramdata); int fcn_fffc7720(void *ramdata); int MRCABI wait_5030(void *ramdata); |