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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-21 11:10:03 +0100
committerNico Huber <nico.h@gmx.de>2019-04-06 16:09:12 +0000
commitbf0970e762a6611cef06af761bc2dec068d439bb (patch)
tree44d4854b7027794bc5a76b44a4e8fd07935cd60c /src/northbridge/intel/haswell
parent161eafb0fb9563decbb953d5dccac4762b770e0c (diff)
downloadcoreboot-bf0970e762a6611cef06af761bc2dec068d439bb.tar.xz
src: Use include <delay.h> when appropriate
Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: David Guckian
Diffstat (limited to 'src/northbridge/intel/haswell')
-rw-r--r--src/northbridge/intel/haswell/minihd.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c
index 994296adb0..61265dd281 100644
--- a/src/northbridge/intel/haswell/minihd.c
+++ b/src/northbridge/intel/haswell/minihd.c
@@ -21,7 +21,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/mmio.h>
-#include <delay.h>
#include <stdlib.h>
#include <southbridge/intel/lynxpoint/hda_verb.h>