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| author | Martin Roth <martinroth@google.com> | 2017-06-24 14:48:50 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-27 17:16:19 +0000 |
| commit | 33232604a71cfb84ef21ff2adc14f4554d1bedb4 (patch) | |
| tree | 7830a72a4eeb74a5adcff6544129bab86acceed1 /src/northbridge/intel/haswell | |
| parent | 71693ba43fa8f0d0e7560a3c0a0c465fbd49ce1a (diff) | |
| download | coreboot-33232604a71cfb84ef21ff2adc14f4554d1bedb4.tar.xz | |
nb/intel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: Id5bc8b75b1fa372f31982b8636f1efa4975b61a5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/haswell')
| -rw-r--r-- | src/northbridge/intel/haswell/acpi/haswell.asl | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/acpi/haswell.asl b/src/northbridge/intel/haswell/acpi/haswell.asl index 8395a95448..726fbe494b 100644 --- a/src/northbridge/intel/haswell/acpi/haswell.asl +++ b/src/northbridge/intel/haswell/acpi/haswell.asl @@ -33,7 +33,7 @@ Device (PDRC) Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH -#if CONFIG_CHROMEOS_RAMOOPS +#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS) Memory32Fixed(ReadWrite, CONFIG_CHROMEOS_RAMOOPS_RAM_START, CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE) #endif diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index fa4dec91e2..76da5a0080 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -30,7 +30,7 @@ #include "chip.h" #include "haswell.h" -#if CONFIG_CHROMEOS +#if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/chromeos.h> #endif diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 63cbb709d4..a8c8015d97 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -368,7 +368,7 @@ static void mc_add_dram_resources(device_t dev) mmio_resource(dev, index++, (0xa0000 >> 10), (0xc0000 - 0xa0000) >> 10); reserved_ram_resource(dev, index++, (0xc0000 >> 10), (0x100000 - 0xc0000) >> 10); -#if CONFIG_CHROMEOS_RAMOOPS +#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS) reserved_ram_resource(dev, index++, CONFIG_CHROMEOS_RAMOOPS_RAM_START >> 10, CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE >> 10); |