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authorNico Huber <nico.h@gmx.de>2017-05-20 02:26:12 +0200
committerNico Huber <nico.h@gmx.de>2017-05-22 10:25:42 +0200
commit0df9a010097b8842fbb286059953bfbea71feeed (patch)
treece65d7ef0a7650f0a17c3625e424779a4b8d8865 /src/northbridge/intel/haswell
parent10326ba889919f94c29e847769766a52d1f2cea7 (diff)
downloadcoreboot-0df9a010097b8842fbb286059953bfbea71feeed.tar.xz
nb/intel/haswell: Fix up C NGI remnants
Change-Id: I3cd5e99b9954a68837de85b49b4389b668e00cf4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/19802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/haswell')
-rw-r--r--src/northbridge/intel/haswell/Kconfig1
-rw-r--r--src/northbridge/intel/haswell/gma.c2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 48a92b6d74..d5dec53041 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -18,7 +18,6 @@ config NORTHBRIDGE_INTEL_HASWELL
select CPU_INTEL_HASWELL
select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
select INTEL_DDI
- select INTEL_DP
select INTEL_GMA_ACPI
select RELOCATABLE_RAMSTAGE
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 9096d8cf9a..a7478de128 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -430,7 +430,7 @@ static void gma_func0_init(struct device *dev)
find_resource(dev, PCI_BASE_ADDRESS_2);
if (!linearfb_res || !linearfb_res->base)
- return;
+ return;
/* IGD needs to be Bus Master */
reg32 = pci_read_config32(dev, PCI_COMMAND);