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authorArthur Heymans <arthur@aheymans.xyz>2017-01-25 15:27:52 +0100
committerMartin Roth <martinroth@google.com>2017-02-04 23:08:38 +0100
commit410f256b6fa797b5046c86c91417da44b6549272 (patch)
tree160bf59155db228e56b9f61abcccb4017ab3b432 /src/northbridge/intel/haswell
parent9471d00a4f5acc5697d52e18dd74f909560a9031 (diff)
downloadcoreboot-410f256b6fa797b5046c86c91417da44b6549272.tar.xz
Only show CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM option when implemented
This also selects RELOCATABLE_RAMSTAGE and CACHE_RELOCATABLE_RAMSTAGE_OUTSIDE_CBMEM by default on Haswell. Change-Id: I50b9ee8bbfb3611fccfd1cfde58c6c9f46b189ca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18232 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/haswell')
-rw-r--r--src/northbridge/intel/haswell/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 4fc117d167..e9a93bacae 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -20,6 +20,8 @@ config NORTHBRIDGE_INTEL_HASWELL
select INTEL_DDI
select INTEL_DP
select INTEL_GMA_ACPI
+ select RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
if NORTHBRIDGE_INTEL_HASWELL