diff options
| author | Alexander Couzens <lynxis@fe80.eu> | 2016-03-09 03:13:45 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-11 18:56:21 +0100 |
| commit | 81c5c761b305dd62019759e5e39248b02c0af820 (patch) | |
| tree | 25aa975422c72af95b419b5768e53749a06ff458 /src/northbridge/intel/haswell | |
| parent | 013accca7fb955dd04ee8a51d98e3d94a4941346 (diff) | |
| download | coreboot-81c5c761b305dd62019759e5e39248b02c0af820.tar.xz | |
northbridge/intel: move mrc_cache definition into a common header
The mrc_cache definition and the struct mrc_container are the same
over all intel platforms.
Change-Id: I128a4b5693d27ead709325c597ffe68a0cc78bab
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/13998
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/haswell')
| -rw-r--r-- | src/northbridge/intel/haswell/haswell.h | 13 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/mrccache.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 1 |
3 files changed, 3 insertions, 12 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 8a01edccd9..c560428a06 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -213,18 +213,7 @@ void dump_mem(unsigned start, unsigned end); void report_platform_info(void); #endif /* !__SMM__ */ - -#define MRC_DATA_ALIGN 0x1000 -#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24)) - -struct mrc_data_container { - u32 mrc_signature; // "MRCD" - u32 mrc_data_size; // Actual total size of this structure - u32 mrc_checksum; // IP style checksum - u32 reserved; // For header alignment - u8 mrc_data[0]; // Variable size, platform/run time dependent. -} __attribute__ ((packed)); - +struct mrc_data_container; struct mrc_data_container *find_current_mrc_cache(void); #if !defined(__PRE_RAM__) #include "gma.h" diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index 7139930782..09bf73fcc7 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -20,6 +20,7 @@ #include <cbfs.h> #include <fmap.h> #include <ip_checksum.h> +#include <northbridge/intel/common/mrc_cache.h> #include <device/device.h> #include <cbmem.h> #include "pei_data.h" diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 92a453232b..4644f05e59 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -22,6 +22,7 @@ #include <cbfs.h> #include <halt.h> #include <ip_checksum.h> +#include <northbridge/intel/common/mrc_cache.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> #include "raminit.h" |