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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-07-28 21:05:26 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-31 18:28:48 +0200 |
| commit | 15279a9696c70b82c2223264a505da9122f9aa7b (patch) | |
| tree | 7038d85ab02e392f86a618c49f3db31e14d250f0 /src/northbridge/intel/i3100/raminit.c | |
| parent | 585d1a0e7d0025e459a35b470572bcdbfff4e3c8 (diff) | |
| download | coreboot-15279a9696c70b82c2223264a505da9122f9aa7b.tar.xz | |
src/northbridge: Capitalize CPU, RAM and ROM
Change-Id: I5aa27f06f82a8309afb6e06c9e462e5792aa9986
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15940
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i3100/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i3100/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index b69efbc4bb..443716f9ce 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -603,7 +603,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) { long dimm_mask; - /* Test if we can read the spd and if ram is ddr or ddr2 */ + /* Test if we can read the spd and if RAM is ddr or ddr2 */ dimm_mask = spd_detect_dimms(ctrl); if (!(dimm_mask & ((1 << DIMM_SOCKETS) - 1))) { printk(BIOS_ERR, "No memory for this cpu\n"); |