diff options
| author | Stefan Reinauer <stepan@coreboot.org> | 2010-12-27 11:34:57 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-12-27 11:34:57 +0000 |
| commit | 3c0bfaf7da0f93d6887c0a99b85a43cffbcbf6e2 (patch) | |
| tree | a2f502e313bf2fd72aea77d514594509191094cf /src/northbridge/intel/i440bx | |
| parent | acda2fc9acaa02b97efec9b82835306ef85ac90c (diff) | |
| download | coreboot-3c0bfaf7da0f93d6887c0a99b85a43cffbcbf6e2.tar.xz | |
Fix most CONFIG_DEBUG_RAM_SETUP issues.
The intel/xe7501devkit is still broken, I think the (romcc) image is too big to
fit in the bootblock if CONFIG_DEBUG_RAM_SETUP is enabled. It would make sense
to convert all CPU_INTEL_SOCKET_MPGA604 to CAR, but I have no hardware to test.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i440bx')
| -rw-r--r-- | src/northbridge/intel/i440bx/debug.c | 39 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.c | 7 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.h | 4 |
3 files changed, 43 insertions, 7 deletions
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c index 81b9fd8deb..ef2f45c4da 100644 --- a/src/northbridge/intel/i440bx/debug.c +++ b/src/northbridge/intel/i440bx/debug.c @@ -1,10 +1,14 @@ +#include <console/console.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <spd.h> #include "raminit.h" #include <spd.h> #include <console/console.h> +#if CONFIG_DEBUG_RAM_SETUP void dump_spd_registers(void) { -#if CONFIG_DEBUG_RAM_SETUP int i; printk(BIOS_DEBUG, "\n"); for(i = 0; i < DIMM_SOCKETS; i++) { @@ -30,5 +34,36 @@ void dump_spd_registers(void) printk(BIOS_DEBUG, "\n"); } } -#endif } + +static void print_debug_pci_dev(unsigned dev) +{ + print_debug("PCI: "); + print_debug_hex8((dev >> 16) & 0xff); + print_debug_char(':'); + print_debug_hex8((dev >> 11) & 0x1f); + print_debug_char('.'); + print_debug_hex8((dev >> 8) & 7); +} + +void dump_pci_device(unsigned dev) +{ + int i; + print_debug_pci_dev(dev); + print_debug("\n"); + + for (i = 0; i <= 255; i++) { + unsigned char val; + if ((i & 0x0f) == 0) { + print_debug_hex8(i); + print_debug_char(':'); + } + val = pci_read_config8(dev, i); + print_debug_char(' '); + print_debug_hex8(val); + if ((i & 0x0f) == 0x0f) { + print_debug("\n"); + } + } +} +#endif diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index b7d5b29ed8..5fb613c2e7 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -38,11 +38,10 @@ Macros and definitions. /* Debugging macros. */ #if CONFIG_DEBUG_RAM_SETUP -#include "lib/debug.c" #define PRINT_DEBUG(x...) printk(BIOS_DEBUG, x) -#define PRINT_DEBUG_HEX8(x) PRINT_DEBUG("%02x", x) -#define PRINT_DEBUG_HEX16(x) PRINT_DEBUG("%04x", x) -#define PRINT_DEBUG_HEX32(x) PRINT_DEBUG("%08x", x) +#define PRINT_DEBUG_HEX8(x) printk(BIOS_DEBUG, "%02x", x) +#define PRINT_DEBUG_HEX16(x) printk(BIOS_DEBUG, "%04x", x) +#define PRINT_DEBUG_HEX32(x) printk(BIOS_DEBUG, "%08x", x) #define DUMPNORTH() dump_pci_device(NB) #else #define PRINT_DEBUG(x...) diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h index 4bc07967fd..de9b5ab982 100644 --- a/src/northbridge/intel/i440bx/raminit.h +++ b/src/northbridge/intel/i440bx/raminit.h @@ -29,6 +29,8 @@ int spd_read_byte(unsigned int device, unsigned int address); void sdram_set_registers(void); void sdram_set_spd_registers(void); void sdram_enable(void); -void dump_spd_registers(void); +/* Debug */ +void dump_spd_registers(void); +void dump_pci_device(unsigned dev); #endif /* RAMINIT_H */ |