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authorStefan Reinauer <stepan@coreboot.org>2010-12-27 14:31:05 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-27 14:31:05 +0000
commitfc01e5e3bb5ea6d6ba78ca67fd7f5e87af3cdb2e (patch)
tree437c3ab9bfd04dd3d2046cd46f253b8392dc9a5c /src/northbridge/intel/i440bx
parent50e723368970d765e18971bd303f28558c2cb61f (diff)
downloadcoreboot-fc01e5e3bb5ea6d6ba78ca67fd7f5e87af3cdb2e.tar.xz
proper printk handling in src/northbridge/intel/i82810/raminit.c
and drop some romcc relics in 440bx code too Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i440bx')
-rw-r--r--src/northbridge/intel/i440bx/raminit.c28
1 files changed, 6 insertions, 22 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 5fb613c2e7..9fc124b7ff 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -39,15 +39,9 @@ Macros and definitions.
/* Debugging macros. */
#if CONFIG_DEBUG_RAM_SETUP
#define PRINT_DEBUG(x...) printk(BIOS_DEBUG, x)
-#define PRINT_DEBUG_HEX8(x) printk(BIOS_DEBUG, "%02x", x)
-#define PRINT_DEBUG_HEX16(x) printk(BIOS_DEBUG, "%04x", x)
-#define PRINT_DEBUG_HEX32(x) printk(BIOS_DEBUG, "%08x", x)
#define DUMPNORTH() dump_pci_device(NB)
#else
#define PRINT_DEBUG(x...)
-#define PRINT_DEBUG_HEX8(x)
-#define PRINT_DEBUG_HEX16(x)
-#define PRINT_DEBUG_HEX32(x)
#define DUMPNORTH()
#endif
@@ -434,11 +428,8 @@ static void do_ram_command(u32 command)
addr = (dimm_start * 8 * 1024 * 1024) + addr_offset;
if (dimm_end > dimm_start) {
#if 0
- PRINT_DEBUG(" Sending RAM command 0x");
- PRINT_DEBUG_HEX16(reg16);
- PRINT_DEBUG(" to 0x");
- PRINT_DEBUG_HEX32(addr);
- PRINT_DEBUG("\n");
+ PRINT_DEBUG(" Sending RAM command 0x%04x to 0x%08x\n",
+ reg16, addr);
#endif
read32(addr);
@@ -648,11 +639,8 @@ void sdram_set_registers(void)
reg |= register_values[i + 2] & ~(register_values[i + 1]);
pci_write_config8(NB, register_values[i], reg);
#if 0
- PRINT_DEBUG(" Set register 0x");
- PRINT_DEBUG_HEX8(register_values[i]);
- PRINT_DEBUG(" to 0x");
- PRINT_DEBUG_HEX8(reg);
- PRINT_DEBUG("\n");
+ PRINT_DEBUG(" Set register 0x%02x to 0x%02x\n",
+ register_values[i], reg);
#endif
}
}
@@ -885,9 +873,7 @@ static void set_dram_row_attributes(void)
drb |= (drb + (sz.side2 / 8)) << 8;
} else {
#if 0
- PRINT_DEBUG("No DIMM found in slot ");
- PRINT_DEBUG_HEX8(i);
- PRINT_DEBUG("\n");
+ PRINT_DEBUG("No DIMM found in slot %d\n", i);
#endif
/* If there's no DIMM in the slot, set dra to 0x00. */
@@ -900,9 +886,7 @@ static void set_dram_row_attributes(void)
pci_write_config16(NB, DRB + (2 * i), drb);
#if 0
- PRINT_DEBUG("DRB has been set to 0x");
- PRINT_DEBUG_HEX16(drb);
- PRINT_DEBUG("\n");
+ PRINT_DEBUG("DRB has been set to 0x%04x\n", drb);
#endif
/* Brings the upper DRB back down to be base for