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authorKevin Paul Herbert <kph@meraki.net>2014-12-24 18:43:20 -0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-15 08:50:22 +0100
commitbde6d309dfafe58732ec46314a2d4c08974b62d4 (patch)
tree17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/northbridge/intel/i440bx
parent4b10dec1a66122b515b2191f823d7fd379ec655f (diff)
downloadcoreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.xz
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/i440bx')
-rw-r--r--src/northbridge/intel/i440bx/raminit.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index f191abe13e..bed2a51a62 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -387,7 +387,8 @@ static void do_ram_command(u32 command)
int i, caslatency;
u8 dimm_start, dimm_end;
u16 reg16;
- u32 addr, addr_offset;
+ void *addr;
+ u32 addr_offset;
/* Configure the RAM command. */
reg16 = pci_read_config16(NB, SDRAMC);
@@ -424,7 +425,7 @@ static void do_ram_command(u32 command)
dimm_end = pci_read_config8(NB, DRB + i);
- addr = (dimm_start * 8 * 1024 * 1024) + addr_offset;
+ addr = (void *)((dimm_start * 8 * 1024 * 1024) + addr_offset);
if (dimm_end > dimm_start) {
#if 0
PRINT_DEBUG(" Sending RAM command 0x%04x to 0x%08x\n",