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| author | Martin Roth <martinroth@google.com> | 2016-11-18 09:29:03 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-21 23:43:54 +0100 |
| commit | 128c104c4d3b91d3371b03840af460d776af819d (patch) | |
| tree | bb0621ae2c90b512948ba9fee350cf42a49f4db3 /src/northbridge/intel/i5000 | |
| parent | c6ec8dd1cb2303f7f7a71f0f494a6fc30b93dff4 (diff) | |
| download | coreboot-128c104c4d3b91d3371b03840af460d776af819d.tar.xz | |
nb/intel: Fix some spelling mistakes in comments and strings
Change-Id: I4a8297397d878e38516c8df19dd311c7ef19ec06
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17478
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/i5000')
| -rw-r--r-- | src/northbridge/intel/i5000/raminit.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/i5000/raminit.c b/src/northbridge/intel/i5000/raminit.c index 1a802b0174..b8925b2c98 100644 --- a/src/northbridge/intel/i5000/raminit.c +++ b/src/northbridge/intel/i5000/raminit.c @@ -1318,7 +1318,7 @@ static int i5000_dram_timing_init(struct i5000_fbd_setup *setup) ((setup->ddr_speed == DDR_667MHZ ? 1 : 0) << 18) | (1 << 8) | /* enhanced scrub mode */ (1 << 7) | /* enable patrol scrub */ - (1 << 6) | /* enable demand scrubing */ + (1 << 6) | /* enable demand scrubbing */ (1 << 5); /* enable northbound error detection */ printk(BIOS_DEBUG, "DRTA: 0x%08x DRTB: 0x%08x MC: 0x%08x\n", drta, drtb, mc); @@ -1393,7 +1393,7 @@ static void i5000_init_setup(struct i5000_fbd_setup *setup) static void i5000_reserved_register_init(struct i5000_fbd_setup *setup) { - /* register write captured from vendor BIOS, but undocument by Intel */ + /* register write captured from vendor BIOS, but undocumented by Intel */ pci_write_config32(PCI_ADDR(0, 16, 0, 0), I5000_PROCENABLE, 0x487f7c); pci_write_config32(PCI_ADDR(0, 16, 0, 0), 0xf4, 0x1588106); |