diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:29:48 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:30:03 +0200 |
| commit | 12df9505835393239d9e9589cff39a1d1dfddac1 (patch) | |
| tree | ffc470b0ff74d818cd6f0dc5cd750fd414c8d960 /src/northbridge/intel/i855 | |
| parent | 5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (diff) | |
| download | coreboot-12df9505835393239d9e9589cff39a1d1dfddac1.tar.xz | |
northbridge/intel: Add required space before opening parenthesis '('
Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16304
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i855')
| -rw-r--r-- | src/northbridge/intel/i855/debug.c | 14 | ||||
| -rw-r--r-- | src/northbridge/intel/i855/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i855/reset_test.c | 2 |
3 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/intel/i855/debug.c b/src/northbridge/intel/i855/debug.c index a832dda00a..05e934dac4 100644 --- a/src/northbridge/intel/i855/debug.c +++ b/src/northbridge/intel/i855/debug.c @@ -25,7 +25,7 @@ static void print_debug_pci_dev(unsigned dev) static inline void print_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); + for (dev = PCI_DEV(0, 0, 0); dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; @@ -46,7 +46,7 @@ static void dump_pci_device(unsigned dev) print_debug_pci_dev(dev); printk(BIOS_DEBUG, "\n"); - for(i = 0; i <= 255; i++) { + for (i = 0; i <= 255; i++) { unsigned char val; if ((i & 0x0f) == 0) printk(BIOS_DEBUG, "%02x:", i); @@ -60,7 +60,7 @@ static void dump_pci_device(unsigned dev) static inline void dump_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); + for (dev = PCI_DEV(0, 0, 0); dev <= PCI_DEV(0, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; @@ -78,13 +78,13 @@ static inline void dump_spd_registers(void) { int i; printk(BIOS_DEBUG, "\n"); - for(i = 0; i < 2; i++) { + for (i = 0; i < 2; i++) { unsigned device; device = DIMM0 + i; if (device) { int j; printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); - for(j = 0; j < 256; j++) { + for (j = 0; j < 256; j++) { int status; unsigned char byte; if ((j & 0xf) == 0) @@ -106,12 +106,12 @@ static inline void dump_smbus_registers(void) { int i; printk(BIOS_DEBUG, "\n"); - for(i = 1; i < 0x80; i++) { + for (i = 1; i < 0x80; i++) { unsigned device; device = i; int j; printk(BIOS_DEBUG, "smbus: %02x", device); - for(j = 0; j < 256; j++) { + for (j = 0; j < 256; j++) { int status; unsigned char byte; if ((j & 0xf) == 0) diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c index 478966308c..fe6059d703 100644 --- a/src/northbridge/intel/i855/raminit.c +++ b/src/northbridge/intel/i855/raminit.c @@ -447,7 +447,7 @@ static void sdram_enable(void) /* 8 CBR refreshes (Auto Refresh) */ PRINTK_DEBUG(" 8 CBR refreshes\n"); - for(i = 0; i < 8; i++) { + for (i = 0; i < 8; i++) { do_ram_command(RAM_COMMAND_CBR, 0); delay(); delay(); diff --git a/src/northbridge/intel/i855/reset_test.c b/src/northbridge/intel/i855/reset_test.c index 7902911cb7..9ca7854d47 100644 --- a/src/northbridge/intel/i855/reset_test.c +++ b/src/northbridge/intel/i855/reset_test.c @@ -27,7 +27,7 @@ static int bios_reset_detected(void) dword = pci_read_config32(PCI_DEV(0, 0, 0), MCH_DRC); - if( (dword & DRC_DONE) != 0 ) { + if ( (dword & DRC_DONE) != 0 ) { return 1; } |