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| author | Martin Roth <martinroth@google.com> | 2017-06-24 14:48:50 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-27 17:16:19 +0000 |
| commit | 33232604a71cfb84ef21ff2adc14f4554d1bedb4 (patch) | |
| tree | 7830a72a4eeb74a5adcff6544129bab86acceed1 /src/northbridge/intel/i855 | |
| parent | 71693ba43fa8f0d0e7560a3c0a0c465fbd49ce1a (diff) | |
| download | coreboot-33232604a71cfb84ef21ff2adc14f4554d1bedb4.tar.xz | |
nb/intel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: Id5bc8b75b1fa372f31982b8636f1efa4975b61a5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/i855')
| -rw-r--r-- | src/northbridge/intel/i855/raminit.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c index 3fd57656a9..8041951c6f 100644 --- a/src/northbridge/intel/i855/raminit.c +++ b/src/northbridge/intel/i855/raminit.c @@ -29,7 +29,7 @@ Macros and definitions: #define VALIDATE_DIMM_COMPATIBILITY /* Debugging macros. */ -#if CONFIG_DEBUG_RAM_SETUP +#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) #define PRINTK_DEBUG(x...) printk(BIOS_DEBUG, x) #define DUMPNORTH() dump_pci_device(NORTHBRIDGE_MMC) #else @@ -868,11 +868,11 @@ static void spd_set_dram_throttle_control(void) static void spd_update(u8 reg, u32 new_value) { -#if CONFIG_DEBUG_RAM_SETUP +#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) u32 value1 = pci_read_config32(NORTHBRIDGE_MMC, reg); #endif pci_write_config32(NORTHBRIDGE_MMC, reg, new_value); -#if CONFIG_DEBUG_RAM_SETUP +#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) u32 value2 = pci_read_config32(NORTHBRIDGE_MMC, reg); PRINTK_DEBUG("update reg %02x, old: %08x, new: %08x, read back: %08x\n", reg, value1, new_value, value2); #endif |