northbridge: Drop print_ implementation from non-romcc boards

Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)

2 files changed, 35 insertions, 55 deletions

diff --git a/src/northbridge/intel/i855/debug.c b/src/northbridge/intel/i855/debug.c
index 327f47d1e4..ed26fad741 100644
--- a/src/northbridge/intel/i855/debug.c
+++ b/src/northbridge/intel/i855/debug.c
@@ -22,12 +22,8 @@
 
 static void print_debug_pci_dev(unsigned dev)
 {
-	print_debug("PCI: ");
-	print_debug_hex8((dev >> 20) & 0xff);
-	print_debug_char(':');
-	print_debug_hex8((dev >> 15) & 0x1f);
-	print_debug_char('.');
-	print_debug_hex8((dev >> 12) & 0x07);
+	printk(BIOS_DEBUG, "PCI: %02x:%02x.%x",
+		(dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 0x07);
 }
 
 static inline void print_pci_devices(void)
@@ -44,7 +40,7 @@ static inline void print_pci_devices(void)
 			continue;
 		}
 		print_debug_pci_dev(dev);
-		print_debug("\n");
+		printk(BIOS_DEBUG, "\n");
 	}
 }
 
@@ -52,20 +48,16 @@ static void dump_pci_device(unsigned dev)
 {
 	int i;
 	print_debug_pci_dev(dev);
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
-		if ((i & 0x0f) == 0) {
-			print_debug_hex8(i);
-			print_debug_char(':');
-		}
+		if ((i & 0x0f) == 0)
+			printk(BIOS_DEBUG, "%02x:", i);
 		val = pci_read_config8(dev, i);
-		print_debug_char(' ');
-		print_debug_hex8(val);
-		if ((i & 0x0f) == 0x0f) {
-			print_debug("\n");
-		}
+		printk(BIOS_DEBUG, " %02x", val);
+		if ((i & 0x0f) == 0x0f)
+			printk(BIOS_DEBUG, "\n");
 	}
 }
 
@@ -89,34 +81,27 @@ static inline void dump_pci_devices(void)
 static inline void dump_spd_registers(void)
 {
 	int i;
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 	for(i = 0; i < 2; i++) {
 		unsigned device;
 		device = DIMM0 + i;
 		if (device) {
 			int j;
-			print_debug("dimm: ");
-			print_debug_hex8(i);
-			print_debug(".0: ");
-			print_debug_hex8(device);
+			printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 			for(j = 0; j < 256; j++) {
 				int status;
 				unsigned char byte;
-				if ((j & 0xf) == 0) {
-					print_debug("\n");
-					print_debug_hex8(j);
-					print_debug(": ");
-				}
+				if ((j & 0xf) == 0)
+					printk(BIOS_DEBUG, "\n%02x: ", j);
 				status = smbus_read_byte(device, j);
 				if (status < 0) {
-					print_debug("bad device\n");
+					printk(BIOS_DEBUG, "bad device\n");
 					break;
 				}
 				byte = status & 0xff;
-				print_debug_hex8(byte);
-				print_debug_char(' ');
+				printk(BIOS_DEBUG, "%02x ", byte);
 			}
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 	}
 }
@@ -124,30 +109,25 @@ static inline void dump_spd_registers(void)
 static inline void dump_smbus_registers(void)
 {
         int i;
-        print_debug("\n");
+        printk(BIOS_DEBUG, "\n");
         for(i = 1; i < 0x80; i++) {
                 unsigned device;
                 device = i;
                 int j;
-                print_debug("smbus: ");
-                print_debug_hex8(device);
+                printk(BIOS_DEBUG, "smbus: %02x", device);
                 for(j = 0; j < 256; j++) {
                 	int status;
                         unsigned char byte;
-                        if ((j & 0xf) == 0) {
-                	        print_debug("\n");
-                                print_debug_hex8(j);
-                                print_debug(": ");
-                        }
+                        if ((j & 0xf) == 0)
+                	        printk(BIOS_DEBUG, "\n%02x: ", j);
                         status = smbus_read_byte(device, j);
                         if (status < 0) {
-                                print_debug("bad device\n");
+                                printk(BIOS_DEBUG, "bad device\n");
                                 break;
                         }
                         byte = status & 0xff;
-                        print_debug_hex8(byte);
-                        print_debug_char(' ');
+			printk(BIOS_DEBUG, "%02x ", byte);
                 }
-                print_debug("\n");
+                printk(BIOS_DEBUG, "\n");
 	}
 }
diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c
index 0ab4d38c86..39e12d2d0f 100644
--- a/src/northbridge/intel/i855/raminit.c
+++ b/src/northbridge/intel/i855/raminit.c
@@ -415,7 +415,7 @@ static void sdram_enable(void)
 {
 	int i;
 
-	print_debug("Ram enable 1\n");
+	printk(BIOS_DEBUG, "Ram enable 1\n");
 	delay();
 	delay();
 
@@ -433,16 +433,16 @@ static void sdram_enable(void)
 	delay();
 	delay();
 
-	print_debug("Ram enable 4\n");
+	printk(BIOS_DEBUG, "Ram enable 4\n");
 	do_ram_command(RAM_COMMAND_EMRS, SDRAM_EXTMODE_DLL_ENABLE);
 	delay();
 	delay();
 	delay();
 
-	print_debug("Ram enable 5\n");
+	printk(BIOS_DEBUG, "Ram enable 5\n");
 	do_ram_command(RAM_COMMAND_MRS, VG85X_MODE | SDRAM_MODE_DLL_RESET);
 
-	print_debug("Ram enable 6\n");
+	printk(BIOS_DEBUG, "Ram enable 6\n");
 	do_ram_command(RAM_COMMAND_PRECHARGE, 0);
 	delay();
 	delay();
@@ -457,7 +457,7 @@ static void sdram_enable(void)
 		delay();
 	}
 
-	print_debug("Ram enable 8\n");
+	printk(BIOS_DEBUG, "Ram enable 8\n");
 	do_ram_command(RAM_COMMAND_MRS, VG85X_MODE | SDRAM_MODE_NORMAL);
 
 	/* Set GME-M Mode Select bits back to NORMAL operation mode */
@@ -467,7 +467,7 @@ static void sdram_enable(void)
 	delay();
 	delay();
 
-	print_debug("Ram enable 9\n");
+	printk(BIOS_DEBUG, "Ram enable 9\n");
 	set_initialize_complete();
 
 	delay();
@@ -476,11 +476,11 @@ static void sdram_enable(void)
 	delay();
 	delay();
 
-	print_debug("After configuration:\n");
+	printk(BIOS_DEBUG, "After configuration:\n");
 	/* dump_pci_devices(); */
 
 	/*
-	print_debug("\n\n***** RAM TEST *****\n");
+	printk(BIOS_DEBUG, "\n\n***** RAM TEST *****\n");
 	ram_check(0, 0xa0000);
 	ram_check(0x100000, 0x40000000);
 	*/
@@ -497,7 +497,7 @@ DIMM-independant configuration functions:
 static void sdram_set_registers(void)
 {
 	/*
-	print_debug("Before configuration:\n");
+	printk(BIOS_DEBUG, "Before configuration:\n");
 	dump_pci_devices();
 	*/
 }
@@ -572,13 +572,13 @@ static void spd_set_dram_controller_mode(uint8_t dimm_mask)
 		die_on_spd_error(value);
 		value &= 0x7f;	// Mask off self-refresh bit
 		if (value > MAX_SPD_REFRESH_RATE) {
-			print_err("unsupported refresh rate\n");
+			printk(BIOS_ERR, "unsupported refresh rate\n");
 			continue;
 		}
 		// Get the appropriate i855 refresh mode for this DIMM
 		dimm_refresh_mode = refresh_rate_map[value];
 		if (dimm_refresh_mode > 7) {
-			print_err("unsupported refresh rate\n");
+			printk(BIOS_ERR, "unsupported refresh rate\n");
 			continue;
 		}
 		// If this DIMM requires more frequent refresh than others,
@@ -965,7 +965,7 @@ static void sdram_set_spd_registers(void)
 	dimm_mask = spd_get_supported_dimms();
 
 	if (dimm_mask == 0) {
-		print_debug("No usable memory for this controller\n");
+		printk(BIOS_DEBUG, "No usable memory for this controller\n");
 	} else {
 		PRINTK_DEBUG("DIMM MASK: %02x\n", dimm_mask);