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| author | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-26 16:13:40 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2004-08-26 16:13:40 +0000 |
| commit | 6707a45eb14bf28abd2a38e1b95d30d27262f347 (patch) | |
| tree | f6add8095bc5deec447bb667efe170320e69d5fc /src/northbridge/intel/i855pm/raminit.c | |
| parent | 1ddc8eaddb54b05a9ecb5ffbf9ba3e3264f63ec3 (diff) | |
| download | coreboot-6707a45eb14bf28abd2a38e1b95d30d27262f347.tar.xz | |
just a few changes before we hit the big fun.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel/i855pm/raminit.c')
| -rw-r--r-- | src/northbridge/intel/i855pm/raminit.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c index 4f7ab231fd..5bb3b7f653 100644 --- a/src/northbridge/intel/i855pm/raminit.c +++ b/src/northbridge/intel/i855pm/raminit.c @@ -1980,7 +1980,15 @@ static void mem_err { static void sdram_enable(int controllers, const struct mem_controller *ctrl) { int i; + uint32_t mchtst; /* 1 & 2 Power up and start clocks */ + /* arg! the parts are memory mapped! For now, just grab address 0xc0000000 as the base, since I want to use + * constants, not variables, for this. + */ + mchtst = pci_read_config32(ctrl->d0, 0xf4); + mchtst |= (1 << 22); + pci_write_config32(ctrl->d0, 0xf4, mchtst); + #if DEBUG_RAM_CONFIG print_debug(ram_enable_1); print_debug(ram_enable_2); |