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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-01-19 12:52:25 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-23 05:19:31 +0000 |
| commit | 8324d87bf4f8900971be5584f11110dc261f14e5 (patch) | |
| tree | 41201a80178b2977e178a8d84c25702206821483 /src/northbridge/intel/i945/i945.h | |
| parent | 36e809ffd61f39da657023e3a7278616ecc4dfb7 (diff) | |
| download | coreboot-8324d87bf4f8900971be5584f11110dc261f14e5.tar.xz | |
nb/intel/i945: Use ESMRAMC instead of 0x9e
Macro renamed to be in accordance with the name used in the datasheet.
Change-Id: I5671c39608769b2c5ea2fb17809430f56e5f0b71
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/23330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 330ace1bed..5929a1d01c 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -75,7 +75,7 @@ #define LAC 0x97 /* Legacy Access Control */ #define TOLUD 0x9c /* Top of Low Used Memory */ #define SMRAM 0x9d /* System Management RAM Control */ -#define ESMRAM 0x9e /* Extended System Management RAM Control */ +#define ESMRAMC 0x9e /* Extended System Management RAM Control */ #define TOM 0xa0 |