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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-30 09:01:24 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-07 12:36:35 +0000 |
commit | 6aea6f7a6b524d86be4fbdaf434aeda6d9f721a9 (patch) | |
tree | 6f21683e7f8fcf3462e0981d433c50ad805a15f9 /src/northbridge/intel/i945 | |
parent | 6683e409d3688217e70f1f19deab152790b0f495 (diff) | |
download | coreboot-6aea6f7a6b524d86be4fbdaf434aeda6d9f721a9.tar.xz |
usbdebug: Force EHCI to D0 state
When resuming from ACPI S3 suspend, EHCI controller
may be in D3 power-management state. Bring it to D0
early so it is functional for console.
NOTE: D3hot->D0 transition was observed to reset
previous programming of PCI_COMMAND register.
Change-Id: Id177ce61926beb057fe67ba42a306d8e565d2657
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/i945')
0 files changed, 0 insertions, 0 deletions