diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-31 09:16:31 +0100 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-05-28 08:27:10 +0200 |
commit | dd2bc3f819ecb64a07f37c2a63621ecadd6b6ed8 (patch) | |
tree | f611f100b307a2acc410a99726825e736d958e40 /src/northbridge/intel/i945 | |
parent | f44ac13db26c5ab18ac2e35111acbf91841a2608 (diff) | |
download | coreboot-dd2bc3f819ecb64a07f37c2a63621ecadd6b6ed8.tar.xz |
igd.asl rewrite
Old igd.asl had inconsistent addresses (between _DOD and actual device)
and ghost devices. Any of those is enough to make brightness on windows
fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous
copying of the same thing 6 times per chipset. Leave only hooking up and
chipset-specific part in chipset directory. Move NVS handling and ACPI-spec
parts to a common file.
Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7472
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r-- | src/northbridge/intel/i945/Kconfig | 1 | ||||
-rw-r--r-- | src/northbridge/intel/i945/acpi/i945.asl | 6 | ||||
-rw-r--r-- | src/northbridge/intel/i945/acpi/igd.asl | 329 | ||||
-rw-r--r-- | src/northbridge/intel/i945/chip.h | 3 | ||||
-rw-r--r-- | src/northbridge/intel/i945/gma.c | 22 |
5 files changed, 66 insertions, 295 deletions
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index a592666918..b17dda6901 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -29,6 +29,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select HAVE_DEBUG_RAM_SETUP select LAPIC_MONOTONIC_TIMER select VGA + select INTEL_GMA_ACPI config NORTHBRIDGE_INTEL_SUBTYPE_I945GC def_bool n diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl index 74302c93de..2a4eb9fd6e 100644 --- a/src/northbridge/intel/i945/acpi/i945.asl +++ b/src/northbridge/intel/i945/acpi/i945.asl @@ -99,9 +99,3 @@ Device (PDRC) // Integrated graphics 0:2.0 #include "igd.asl" - -Scope (\) -{ - // backlight control, display switching, lid - #include "acpi/video.asl" -} diff --git a/src/northbridge/intel/i945/acpi/igd.asl b/src/northbridge/intel/i945/acpi/igd.asl index 8ad70d7968..fb89e55a92 100644 --- a/src/northbridge/intel/i945/acpi/igd.asl +++ b/src/northbridge/intel/i945/acpi/igd.asl @@ -22,301 +22,52 @@ Device (GFX0) { Name (_ADR, 0x00020000) - /* Display Output Switching */ - Method (_DOS, 1) + Name (BRIG, Package (0x12) { - /* Windows 2000 and Windows XP call _DOS to enable/disable - * Display Output Switching during init and while a switch - * is already active - */ - Store (And(Arg0, 7), DSEN) - } - - /* We try to support as many i945 systems as possible, - * so keep the number of DIDs flexible. - */ - Method (_DOD, 0) - { - If (LEqual(NDID, 1)) { - Name(DOD1, Package() { - 0xffffffff - }) - Store (Or(0x00010000, DID1), Index(DOD1, 0)) - Return(DOD1) - } - - If (LEqual(NDID, 2)) { - Name(DOD2, Package() { - 0xffffffff, - 0xffffffff - }) - Store (Or(0x00010000, DID2), Index(DOD2, 0)) - Store (Or(0x00010000, DID2), Index(DOD2, 1)) - Return(DOD2) - } - - If (LEqual(NDID, 3)) { - Name(DOD3, Package() { - 0xffffffff, - 0xffffffff, - 0xffffffff - }) - Store (Or(0x00010000, DID3), Index(DOD3, 0)) - Store (Or(0x00010000, DID3), Index(DOD3, 1)) - Store (Or(0x00010000, DID3), Index(DOD3, 2)) - Return(DOD3) - } - - If (LEqual(NDID, 4)) { - Name(DOD4, Package() { - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff - }) - Store (Or(0x00010000, DID4), Index(DOD4, 0)) - Store (Or(0x00010000, DID4), Index(DOD4, 1)) - Store (Or(0x00010000, DID4), Index(DOD4, 2)) - Store (Or(0x00010000, DID4), Index(DOD4, 3)) - Return(DOD4) - } - - If (LGreater(NDID, 4)) { - Name(DOD5, Package() { - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0xffffffff - }) - Store (Or(0x00010000, DID5), Index(DOD5, 0)) - Store (Or(0x00010000, DID5), Index(DOD5, 1)) - Store (Or(0x00010000, DID5), Index(DOD5, 2)) - Store (Or(0x00010000, DID5), Index(DOD5, 3)) - Store (Or(0x00010000, DID5), Index(DOD5, 4)) - Return(DOD5) - } - - /* Some error happened, but we have to return something */ - Return (Package() {0x00000400}) - } - - Device(DD01) - { - /* Device Unique ID */ - Method(_ADR, 0, Serialized) - { - If(LEqual(DID1, 0)) { - Return (1) - } Else { - Return (And(0xffff, DID1)) - } - } - - /* Device Current Status */ - Method(_DCS, 0) - { - TRAP(1) - If (And(CSTE, 1)) { - Return (0x1f) - } - Return(0x1d) - } - - /* Query Device Graphics State */ - Method(_DGS, 0) - { - If (And(NSTE, 1)) { - Return(1) - } - Return(0) - } - - /* Device Set State */ - Method(_DSS, 1) - { - /* If Parameter Arg0 is (1 << 31) | (1 << 30), the - * display switch was completed - */ - If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) { - Store (NSTE, CSTE) - } - } - } - - Device(DD02) - { - /* Device Unique ID */ - Method(_ADR, 0, Serialized) - { - If(LEqual(DID2, 0)) { - Return (2) - } Else { - Return (And(0xffff, DID2)) - } - } - - /* Device Current Status */ - Method(_DCS, 0) - { - TRAP(1) - If (And(CSTE, 2)) { - Return (0x1f) - } - Return(0x1d) - } - - /* Query Device Graphics State */ - Method(_DGS, 0) - { - If (And(NSTE, 2)) { - Return(1) - } - Return(0) - } - - /* Device Set State */ - Method(_DSS, 1) - { - /* If Parameter Arg0 is (1 << 31) | (1 << 30), the - * display switch was completed - */ - If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) { - Store (NSTE, CSTE) - } - } - } - - - Device(DD03) + 0xf, + 0xf, + 0x0, + 0x1, + 0x2, + 0x3, + 0x4, + 0x5, + 0x6, + 0x7, + 0x8, + 0x9, + 0xa, + 0xb, + 0xc, + 0xd, + 0xe, + 0xf, + }) + + Method (XBCM, 1, NotSerialized) { - /* Device Unique ID */ - Method(_ADR, 0, Serialized) - { - If(LEqual(DID3, 0)) { - Return (3) - } Else { - Return (And(0xffff, DID3)) - } - } - - /* Device Current Status */ - Method(_DCS, 0) - { - TRAP(1) - If (And(CSTE, 4)) { - Return (0x1f) - } - Return(0x1d) - } - - /* Query Device Graphics State */ - Method(_DGS, 0) - { - If (And(NSTE, 4)) { - Return(1) - } - Return(0) - } - - /* Device Set State */ - Method(_DSS, 1) - { - /* If Parameter Arg0 is (1 << 31) | (1 << 30), the - * display switch was completed - */ - If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) { - Store (NSTE, CSTE) - } - } + Store (Or(ShiftLeft (Arg0, 4), 0xf), ^^DSPC.BRTC) +#ifdef SMI_SAVE_CMOS + Trap(SMI_SAVE_CMOS) +#endif } - - Device(DD04) + Method (XBQC, 0, NotSerialized) { - /* Device Unique ID */ - Method(_ADR, 0, Serialized) - { - If(LEqual(DID4, 0)) { - Return (4) - } Else { - Return (And(0xffff, DID4)) - } - } - - /* Device Current Status */ - Method(_DCS, 0) - { - TRAP(1) - If (And(CSTE, 8)) { - Return (0x1f) - } - Return(0x1d) - } - - /* Query Device Graphics State */ - Method(_DGS, 0) - { - If (And(NSTE, 4)) { - Return(1) - } - Return(0) - } - - /* Device Set State */ - Method(_DSS, 1) - { - /* If Parameter Arg0 is (1 << 31) | (1 << 30), the - * display switch was completed - */ - If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) { - Store (NSTE, CSTE) - } - } + Store (^^DSPC.BRTC, Local0) + ShiftRight (Local0, 4, Local0) + Return (Local0) } +#include <drivers/intel/gma/igd.asl> +} - - Device(DD05) +Device (DSPC) +{ + Name (_ADR, 0x00020001) + OperationRegion (DSPC, PCI_Config, 0x00, 0x100) + Field (DSPC, ByteAcc, NoLock, Preserve) { - /* Device Unique ID */ - Method(_ADR, 0, Serialized) - { - If(LEqual(DID5, 0)) { - Return (5) - } Else { - Return (And(0xffff, DID5)) - } - } - - /* Device Current Status */ - Method(_DCS, 0) - { - TRAP(1) - If (And(CSTE, 16)) { - Return (0x1f) - } - Return(0x1d) - } - - /* Query Device Graphics State */ - Method(_DGS, 0) - { - If (And(NSTE, 4)) { - Return(1) - } - Return(0) - } - - /* Device Set State */ - Method(_DSS, 1) - { - /* If Parameter Arg0 is (1 << 31) | (1 << 30), the - * display switch was completed - */ - If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) { - Store (NSTE, CSTE) - } - } + Offset (0xf4), + BRTC, 8 } - -} +}
\ No newline at end of file diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h index 9e25ecc95c..57060869e4 100644 --- a/src/northbridge/intel/i945/chip.h +++ b/src/northbridge/intel/i945/chip.h @@ -1,6 +1,9 @@ +#include <drivers/intel/gma/i915.h> + struct northbridge_intel_i945_config { u32 gpu_hotplug; u32 gpu_backlight; int gpu_lvds_use_spread_spectrum_clock; int gpu_lvds_is_dual_channel; + struct i915_gpu_controller_info gfx; }; diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index ebc2f1c42d..28f611fcb2 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -488,6 +488,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) } } +const struct i915_gpu_controller_info * +intel_gma_get_controller_info(void) +{ + device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); + if (!dev) { + return NULL; + } + struct northbridge_intel_i945_config *chip = dev->chip_info; + return &chip->gfx; +} + +static void gma_ssdt(void) +{ + const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); + if (!gfx) { + return; + } + + drivers_intel_gma_displays_ssdt_generate(gfx); +} + static struct pci_operations gma_pci_ops = { .set_subsystem = gma_set_subsystem, }; @@ -497,6 +518,7 @@ static struct device_operations gma_func0_ops = { .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = gma_func0_init, + .acpi_fill_ssdt_generator = gma_ssdt, .scan_bus = 0, .enable = 0, .disable = gma_func0_disable, |