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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-14 03:49:21 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 06:53:52 +0000
commitf091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (patch)
treef6abac8a52eba4941632cfd89e97cb2c46d80cf1 /src/northbridge/intel/i945
parent5ec97cea676bd45b151f94b73d486cee0f244213 (diff)
downloadcoreboot-f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d.tar.xz
intel/smm/gen1: Rename header file
Change-Id: I258fccc5e1db0bedb641c8af8cb9727954d4d7c1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r--src/northbridge/intel/i945/memmap.c2
-rw-r--r--src/northbridge/intel/i945/northbridge.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index 6092c25770..f2518f45c9 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -24,7 +24,7 @@
#include <cpu/intel/romstage.h>
#include <cpu/x86/mtrr.h>
#include <program_loading.h>
-#include <cpu/intel/smm/gen1/smi.h>
+#include <cpu/intel/smm_reloc.h>
#include <stdint.h>
#include <stage_cache.h>
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index cd16958670..dd4e8ac125 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -23,7 +23,7 @@
#include <stdlib.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
-#include <cpu/intel/smm/gen1/smi.h>
+#include <cpu/intel/smm_reloc.h>
#include "i945.h"
static int get_pcie_bar(u32 *base)