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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-22 14:38:21 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2018-06-23 22:25:51 +0000 |
commit | fe2510764d0454283b67205e3d5e822af6648bee (patch) | |
tree | dd67da0e0dddc89c5c202c6733878bb24508a3c6 /src/northbridge/intel/i945 | |
parent | 1d23eb6d3728e332dd50bddb6c06b6e8a73a8253 (diff) | |
download | coreboot-fe2510764d0454283b67205e3d5e822af6648bee.tar.xz |
nb/intel/i945: Remove dead code
Regarding "Intel 945G/945GZ/945GC/945P/945PL Express Chipset Family",
Document Number: 307502-005, page 91, if Channel B is empty,
all of the C1DRBs are programmed with the same value as C0DRB3.
Mobile 945 express chipset datasheet doesn't mention this specific case.
Change-Id: Ic26103aac7f920e5696b445e125d33405df4f43b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27204
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r-- | src/northbridge/intel/i945/raminit.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 67199612b3..d7a349ffc4 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1198,13 +1198,6 @@ static int sdram_program_row_boundaries(struct sys_info *sysinfo) if (sysinfo->interleaved) cum1 = 0; -#if 0 - /* Exception: Channel 1 is not populated. C1DRB stays zero */ - if (sysinfo->dimm[2] == SYSINFO_DIMM_NOT_POPULATED && - sysinfo->dimm[3] == SYSINFO_DIMM_NOT_POPULATED) - cum1 = 0; -#endif - for (i = 0; i < 2 * DIMM_SOCKETS; i++) { cum1 += sysinfo->banksize[i + 4]; MCHBAR8(C1DRB0+i) = cum1; |