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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 18:21:43 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:32:12 +0000 |
commit | c642a0d8942735b393040b877769f1d4a3a9ebe8 (patch) | |
tree | cf118ea9fd286c47bed111a309f23e47c99cba65 /src/northbridge/intel/ironlake/early_init.c | |
parent | a457e352374e0efe4944bd1c81a3ca8ffd65b750 (diff) | |
download | coreboot-c642a0d8942735b393040b877769f1d4a3a9ebe8.tar.xz |
nb/intel/ironlake: Add Generic Non-Core PCI device definition
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.
Change-Id: I8feff0d71ad70ac994e29b238d35e2c73aa92ecd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/ironlake/early_init.c')
-rw-r--r-- | src/northbridge/intel/ironlake/early_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/ironlake/early_init.c b/src/northbridge/intel/ironlake/early_init.c index 2154478bdb..24657d6616 100644 --- a/src/northbridge/intel/ironlake/early_init.c +++ b/src/northbridge/intel/ironlake/early_init.c @@ -43,7 +43,7 @@ static void early_cpu_init(void) /* bit 0 = disable multicore, bit 1 = disable quadcore, bit 8 = disable hyperthreading. */ - pci_update_config32(PCI_DEV(0xff, 0x00, 0), 0x80, 0xfffffefc, 0x10000); + pci_update_config32(QPI_NON_CORE, 0x80, 0xfffffefc, 0x10000); u8 reg8; struct cpuid_result result; |