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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 12:02:20 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:42:13 +0000 |
| commit | 9dfd6150bd30657c93e4edd21c8cec77c5fcfe02 (patch) | |
| tree | 2d09ed5983958eb47bc2cd129cf43a619671e354 /src/northbridge/intel/ironlake/memmap.c | |
| parent | 579ccdf9c9ed7deeef58356257d1a9b93727a90d (diff) | |
| download | coreboot-9dfd6150bd30657c93e4edd21c8cec77c5fcfe02.tar.xz | |
nb/intel/sandybridge/acpi.c: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in
numerical order. i.e., All remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: I1f84cae41c6281e0d545669f1e7de5cab0d9f9c0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/ironlake/memmap.c')
0 files changed, 0 insertions, 0 deletions