summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/nehalem/gma.c
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2013-08-19 10:16:50 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-13 19:32:11 +0200
commit77f48cdeade7fc296fb5c973b6b0191ac5bd8c35 (patch)
treed33aac05f3759fde05c29c1d43b0aaeed07c34d8 /src/northbridge/intel/nehalem/gma.c
parent61ffb4ca2e53004d3a282bfc2c97e58131cc9ef3 (diff)
downloadcoreboot-77f48cdeade7fc296fb5c973b6b0191ac5bd8c35.tar.xz
Falco/Slippy: Patch to refactor haswell/gma.c and mainboard/google/slippy/i915io.c
A large portion of documented registers have been initialized using macros. Only a few undocumented registers are left out. i915io.c looks lot more cleaner by removing redundant calls. However, some more work is required to correctly identify which calls are not required. All the io_writes are replaced by gtt_writes. Change-Id: I077a235652c7d5eb90346cd6e15cc48b5161e969 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/66204 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 39f3289f68b527575b0a120960ff67f78415815e) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6600 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/nehalem/gma.c')
-rw-r--r--src/northbridge/intel/nehalem/gma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 2470b0f4a0..f76fbc4e15 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -272,12 +272,12 @@ u32 map_oprom_vendev(u32 vendev)
static struct resource *gtt_res = NULL;
-static inline u32 gtt_read(u32 reg)
+u32 gtt_read(u32 reg)
{
return read32(gtt_res->base + reg);
}
-static inline void gtt_write(u32 reg, u32 data)
+void gtt_write(u32 reg, u32 data)
{
write32(gtt_res->base + reg, data);
}