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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-01 21:14:05 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-06 10:11:20 +0000 |
| commit | 6d13a0a78a03d24c7e390b44d54d1be3fd3fb51c (patch) | |
| tree | e1505d0b68832761c06c84a5b1f9124580190c0e /src/northbridge/intel/nehalem/nehalem.h | |
| parent | f503b60bb9f374741d6d262c4db04e4a4c3aaa0b (diff) | |
| download | coreboot-6d13a0a78a03d24c7e390b44d54d1be3fd3fb51c.tar.xz | |
nb/nehalem: Remove bogus MCHBAR writes
On these CPUs the MCHBAR window is 16KiB large. This code was just
copied from SNB.
Change-Id: I263cfc678a2eb8eeee8ab9157c749359064a9be8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/nehalem/nehalem.h')
| -rw-r--r-- | src/northbridge/intel/nehalem/nehalem.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index 21c2a395fe..f3b9dbbd7d 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -177,9 +177,6 @@ typedef struct { #define MCHBAR32_OR(x, or) (MCHBAR32(x) = MCHBAR32(x) | (or)) #define MCHBAR32_AND_OR(x, and, or) \ (MCHBAR32(x) = (MCHBAR32(x) & (and)) | (or)) - -#define BIOS_RESET_CPL 0x5da8 /* 8bit */ - /* * EPBAR - Egress Port Root Complex Register Block */ |