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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-14 03:49:21 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-15 06:53:52 +0000 |
commit | f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (patch) | |
tree | f6abac8a52eba4941632cfd89e97cb2c46d80cf1 /src/northbridge/intel/nehalem | |
parent | 5ec97cea676bd45b151f94b73d486cee0f244213 (diff) | |
download | coreboot-f091f4daf7e76cff3cdf9b7a19bb77281fb6af9d.tar.xz |
intel/smm/gen1: Rename header file
Change-Id: I258fccc5e1db0bedb641c8af8cb9727954d4d7c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/nehalem')
-rw-r--r-- | src/northbridge/intel/nehalem/memmap.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/nehalem/northbridge.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/nehalem/smi.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/nehalem/memmap.c b/src/northbridge/intel/nehalem/memmap.c index 031240c2f3..d592aea0b3 100644 --- a/src/northbridge/intel/nehalem/memmap.c +++ b/src/northbridge/intel/nehalem/memmap.c @@ -24,7 +24,7 @@ #include <cpu/x86/mtrr.h> #include <program_loading.h> #include <stage_cache.h> -#include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/smm_reloc.h> #include "nehalem.h" static uintptr_t smm_region_start(void) diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c index b6741a88fa..4ab89ad054 100644 --- a/src/northbridge/intel/nehalem/northbridge.c +++ b/src/northbridge/intel/nehalem/northbridge.c @@ -29,7 +29,7 @@ #include <cpu/cpu.h> #include "chip.h" #include "nehalem.h" -#include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/smm_reloc.h> static int bridge_revision_id = -1; diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c index 5bfc934e04..8c19852043 100644 --- a/src/northbridge/intel/nehalem/smi.c +++ b/src/northbridge/intel/nehalem/smi.c @@ -19,7 +19,7 @@ #include <device/pci_ops.h> #include "nehalem.h" -#include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/smm_reloc.h> void northbridge_write_smram(u8 smram) { |