summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/nehalem
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-01 13:43:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-01 20:32:15 +0000
commitf1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch)
treed8aae223f0e426f189cb4750b972a31e09d46b88 /src/northbridge/intel/nehalem
parent44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff)
downloadcoreboot-f1b58b78351d7ed220673e688a2f7bc9e96da4e2.tar.xz
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included from <arch/io.h> use <device/pci_ops.h> instead. Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/nehalem')
-rw-r--r--src/northbridge/intel/nehalem/acpi.c1
-rw-r--r--src/northbridge/intel/nehalem/bootblock.c1
-rw-r--r--src/northbridge/intel/nehalem/early_init.c1
-rw-r--r--src/northbridge/intel/nehalem/northbridge.c1
-rw-r--r--src/northbridge/intel/nehalem/ram_calc.c1
-rw-r--r--src/northbridge/intel/nehalem/raminit.c1
-rw-r--r--src/northbridge/intel/nehalem/smi.c1
7 files changed, 7 insertions, 0 deletions
diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c
index 08fc09c534..462cdc07fa 100644
--- a/src/northbridge/intel/nehalem/acpi.c
+++ b/src/northbridge/intel/nehalem/acpi.c
@@ -21,6 +21,7 @@
#include <types.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "nehalem.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/nehalem/bootblock.c b/src/northbridge/intel/nehalem/bootblock.c
index 807e91936f..c37aa3a61d 100644
--- a/src/northbridge/intel/nehalem/bootblock.c
+++ b/src/northbridge/intel/nehalem/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
static void bootblock_northbridge_init(void)
{
diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index ac0ed45d4c..2c958a4c86 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <elog.h>
#include <cpu/x86/msr.h>
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index fbe6c11546..43ec6ed6bd 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_2065x/model_2065x.h>
diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/ram_calc.c
index baf087e412..3df6f8153f 100644
--- a/src/northbridge/intel/nehalem/ram_calc.c
+++ b/src/northbridge/intel/nehalem/ram_calc.c
@@ -18,6 +18,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index c730b5ef5f..9812e532e4 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cbmem.h>
#include <arch/cbfs.h>
diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c
index a08ac1b02e..6aefc9b141 100644
--- a/src/northbridge/intel/nehalem/smi.c
+++ b/src/northbridge/intel/nehalem/smi.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "nehalem.h"
#include <cpu/intel/smm/gen1/smi.h>