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author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-31 13:40:15 -0700 |
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committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-05 01:54:55 +0200 |
commit | d52636113aa2ff7da27f710db9b8a53ac5de6ed2 (patch) | |
tree | da54268eb392b4c18ad8849a2ba6351bb364352d /src/northbridge/intel/pineview | |
parent | f26fc0f28bf62dd34533aea47105f174ee794e66 (diff) | |
download | coreboot-d52636113aa2ff7da27f710db9b8a53ac5de6ed2.tar.xz |
soc/intel/quark: Disable FSP serial output
Disable FSP output when CONFIG_DEFAULT_CONSOLE_LOGLEVEL is not set to 8
(BIOS_SPEW). Use the console log level to choose between the serial
port address and NULL and pass it to FSP for the serial port address.
TEST=Build and run on Galileo Gen2.
Change-Id: I5498aad218524c211082d85d0ae9aacaf08a80f6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16005
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/intel/pineview')
0 files changed, 0 insertions, 0 deletions