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author | Patrick Rudolph <siro@das-labor.org> | 2017-10-28 18:20:11 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-14 10:02:14 +0000 |
commit | dd662870dd9da0be937c593b0b62f3b5c8030cf7 (patch) | |
tree | 73b465c828ea52e50eb4a856eaee47cad40a36eb /src/northbridge/intel/sandybridge/Kconfig | |
parent | 05d4bf7ea76114dcbd21f8302e7152f40d806f18 (diff) | |
download | coreboot-dd662870dd9da0be937c593b0b62f3b5c8030cf7.tar.xz |
nb/intel/sandybridge/raminit: Add ECC support
Add ECC support for native raminit on SandyBridge/IvyBridge.
Change-Id: I1206746332c9939a78b67e7b48d3098bdef8a2ed
Depends-On: I5b7599746195cfa996a48320404a8dbe6820483a
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/22215
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Kconfig')
-rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 29a6db7fb3..6b7520f27d 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -100,6 +100,12 @@ config DCACHE_RAM_MRC_VAR_SIZE hex default 0x0 +config RAMINIT_ENABLE_ECC + bool "Enable ECC if supported" + default y + help + Enable ECC if supported by both, host and RAM. + endif # USE_NATIVE_RAMINIT if !USE_NATIVE_RAMINIT |