diff options
author | Vadim Bendebury <vbendeb@chromium.org> | 2012-06-07 18:47:13 -0700 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-11-14 05:19:21 +0100 |
commit | 48a4a7f24453e8fd0672146d78d7790539c6a2f8 (patch) | |
tree | 645bcce02a07405fb7e47ed24ec32ab9830f7781 /src/northbridge/intel/sandybridge/raminit.c | |
parent | a42e2f4daaa9537eeea41f68eae1ef16265f4010 (diff) | |
download | coreboot-48a4a7f24453e8fd0672146d78d7790539c6a2f8.tar.xz |
Provide MRC with a console printing callback function
Let memory initialization code use the coreboot romstage console. This
simplifies the code and makes sure that all output is available in
/sys/firmware/log.
The pei_data structure is modified to allow passing the console output
function pointer. Romstage console_tx_byte() is used for this purpose.
Change-Id: I722cfcb9ff0cf527c12cb6cac09d77ef17b588e0
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/1823
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 8248fa1486..2b46873e4d 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -241,6 +241,9 @@ void sdram_initialize(struct pei_data *pei_data) hlt(); } + /* Pass console handler in pei_data */ + pei_data->tx_byte = console_tx_byte; + /* Locate and call UEFI System Agent binary. */ entry = (unsigned long)cbfs_find_file("mrc.bin", 0xab); if (entry) { |