diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2012-04-18 15:47:32 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-05-02 19:52:37 +0200 |
| commit | 7a3f36a228eeb30acb9f3adde2798e9f401849d2 (patch) | |
| tree | a175367bcd4783c52e65b30160639d208c4d021c /src/northbridge/intel/sandybridge/raminit.c | |
| parent | 4aca5d7e66178c11c15d29fb439622c93680c06c (diff) | |
| download | coreboot-7a3f36a228eeb30acb9f3adde2798e9f401849d2.tar.xz | |
Sandybridge: Display platform information early
It is important to have the system configuration reported as early as
possible to have a better idea what exact chipset the platform is
running with.
This change adds code to have an early coreboot module report the CPU
and PCH information. CPU info includes the 32 bit feature information
word, the symbolic processor brand string, and information about some
features support, as obtained through CPUID instructions.
The PCH information includes the symbolic device name and PCI device
version.
Change-Id: If6c21ad5ffb76d7d57d89f4f87d04bdd7192480a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/975
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index bbb743ff35..e1d5d26dc0 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -318,6 +318,8 @@ void sdram_initialize(struct pei_data *pei_data) const char *target = "mrc.bin"; unsigned long entry; + report_platform_info(); + /* Wait for ME to be ready */ intel_early_me_init(); intel_early_me_uma_size(); |