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| author | Duncan Laurie <dlaurie@chromium.org> | 2012-04-09 12:30:43 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-01 20:04:41 +0200 |
| commit | 7b508ddecb25d60945f088914f739ee5b3c2c175 (patch) | |
| tree | 105871504649f0f1b3a2a0c4490d10b0c8a9ec26 /src/northbridge/intel/sandybridge/raminit.c | |
| parent | 0ff99b70f5c5b6797507d3f152c5d452e1210110 (diff) | |
| download | coreboot-7b508ddecb25d60945f088914f739ee5b3c2c175.tar.xz | |
Only send ME Dram Init Done message on Sandybridge
This is done inside the SystemAgent binary on Ivybridge.
Change-Id: I8fb0f593a65a4803e160b284c21b9d5021e2e4a0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/970
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index dcf9f637f3..bbb743ff35 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -27,6 +27,7 @@ #include <cbfs.h> #include <ip_checksum.h> #include <pc80/mc146818rtc.h> +#include <device/pci_def.h> #include "raminit.h" #include "pei_data.h" #include "sandybridge.h" @@ -365,7 +366,13 @@ void sdram_initialize(struct pei_data *pei_data) version >> 24 , (version >> 16) & 0xff, (version >> 8) & 0xff, version & 0xff); - intel_early_me_init_done(ME_INIT_STATUS_SUCCESS); + /* Send ME init done for SandyBridge here. This is done + * inside the SystemAgent binary on IvyBridge. */ + if (BASE_REV_SNB == + (pci_read_config16(PCI_CPU_DEVICE, PCI_DEVICE_ID) & BASE_REV_MASK)) + intel_early_me_init_done(ME_INIT_STATUS_SUCCESS); + else + intel_early_me_status(); report_memory_config(); |