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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-18 18:52:04 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-20 21:22:25 +0100 |
commit | fc5d85cc66046b239fdd45ff422d70146da1030c (patch) | |
tree | 29d21977647671706f448ad4ee2f9674dc18c920 /src/northbridge/intel/sandybridge/raminit_native.h | |
parent | 7dc4b84d8c61f233cb33f2adb7962f2f8a95badb (diff) | |
download | coreboot-fc5d85cc66046b239fdd45ff422d70146da1030c.tar.xz |
intel sandy/ivy: Change CRC used to detect DIMM replacement
Switch to use CRC of unique identifier section SPD[117..127],
remaining area of SPD data is ignored.
Change-Id: If4b43183f99f5f911ae6c311b43c29a72b9922e2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17487
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_native.h')
0 files changed, 0 insertions, 0 deletions