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author | Felix Held <felix-coreboot@felixheld.de> | 2018-07-28 14:49:31 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2018-07-29 17:27:43 +0000 |
commit | b9267f0cec6677cfb215fab955756e5f9aefe3b5 (patch) | |
tree | b126b238e0b29b82bfedca18876055c6cc0fcf80 /src/northbridge/intel/sandybridge/sandybridge.h | |
parent | a662777b6f57271392d9b52b4f7c002240893aa1 (diff) | |
download | coreboot-b9267f0cec6677cfb215fab955756e5f9aefe3b5.tar.xz |
sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macros
Change-Id: If8b8fd123e0dd15a0fc9dfe178076f8541e29d56
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/sandybridge.h')
-rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 693bfb7c99..3c082f1365 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -122,9 +122,9 @@ enum platform_type { * MCHBAR */ -#define MCHBAR8(x) *((volatile u8 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR16(x) *((volatile u16 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) +#define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) #define MCHBAR32_OR(x, or) MCHBAR32(x) = (MCHBAR32(x) | (or)) #define SSKPD 0x5d14 /* 16bit (scratchpad) */ @@ -134,9 +134,9 @@ enum platform_type { * EPBAR - Egress Port Root Complex Register Block */ -#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x)) -#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x)) -#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x)) +#define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) #define EPPVCCAP1 0x004 /* 32bit */ #define EPPVCCAP2 0x008 /* 32bit */ @@ -165,9 +165,9 @@ enum platform_type { * DMIBAR */ -#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x)) +#define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) #define DMIVCECH 0x000 /* 32bit */ #define DMIPVCCAP1 0x004 /* 32bit */ |