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author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-10 01:36:25 +0100 |
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committer | Martin Roth <martinroth@google.com> | 2016-02-12 04:20:57 +0100 |
commit | ffbb3c0b8abea621eb7a1583d630cf06c8cbfbbc (patch) | |
tree | 9a45adcee57358dd8ebafc4201db2cbd0beef679 /src/northbridge/intel/sandybridge/sandybridge.h | |
parent | 622eea7e815af39dbee290eddc487baab5e8a5f5 (diff) | |
download | coreboot-ffbb3c0b8abea621eb7a1583d630cf06c8cbfbbc.tar.xz |
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Change-Id: I11e09804ed1d8a7ae8b8d4502bd18f6be933f9fa
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13656
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/sandybridge.h')
-rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 0a1f20a06f..570e1f7864 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -215,8 +215,16 @@ void dump_pci_devices(void); void dump_spd_registers(void); void dump_mem(unsigned start, unsigned end); void report_platform_info(void); + #endif /* !__SMM__ */ +void rcba_config(void); +void pch_enable_lpc(void); +void mainboard_early_init(int s3resume); +void mainboard_config_superio(void); +int mainboard_should_reset_usb(int s3resume); +void perform_raminit(int s3resume); + #if ENV_RAMSTAGE #include <device/device.h> |