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authorAaron Durbin <adurbin@chromium.org>2015-09-02 17:34:04 -0500
committerAaron Durbin <adurbin@chromium.org>2015-09-04 21:01:58 +0000
commit4d3de7e328fd92498fd7cf149a0aa887e33f8dfd (patch)
treeee9d7e90560ce453a801eb09f2c02a5b5c86a50b /src/northbridge/intel/sandybridge
parentc6a177d50064a22215c8f682e1d16043d5470fa8 (diff)
downloadcoreboot-4d3de7e328fd92498fd7cf149a0aa887e33f8dfd.tar.xz
bootstate: remove need for #ifdef ENV_RAMSTAGE
The BOOT_STATE_INIT_ENTRY macro can only be used in ramstage, however the current state of the header meant bad build errors in non-ramstage. Therefore, people had to #ifdef in the source. Remove that requirement. Change-Id: I8755fc68bbaca6b72fbe8b4db4bcc1ccb35622bd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11492 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index f89fc0fa98..2086427c97 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -128,7 +128,7 @@ static struct mrc_data_container *find_current_mrc_cache_local
/* SPI code needs malloc/free.
* Also unknown if writing flash from XIP-flash code is a good idea
*/
-#if !defined(__PRE_RAM__)
+
/* find the first empty block in the MRC cache area.
* If there's none, return NULL.
*
@@ -229,7 +229,6 @@ static void update_mrc_cache(void *unused)
}
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
-#endif
struct mrc_data_container *find_current_mrc_cache(void)
{