diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-01 20:23:18 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-13 21:10:13 +0000 |
| commit | 63c0dc9dba17973ad7a39895919929e118242b3b (patch) | |
| tree | d44327a69961aaa73e78ce77403e74ae26adb591 /src/northbridge/intel/sandybridge | |
| parent | e31506cd51a29f77c34e2e524801b2d0db1a5798 (diff) | |
| download | coreboot-63c0dc9dba17973ad7a39895919929e118242b3b.tar.xz | |
nb/intel/sandybridge: Improve cbmem_top_chipset calculation
Lock bit in TSEGMB register wasn't accounted for in `cbmem_top_chipset`.
Align down TSEG base to 1 MiB granularity to avoid surprises.
Change-Id: I74882db99502ae77c94d43d850533a4f76da2773
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45923
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/memmap.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c index b0a5149dbf..7f46d6663e 100644 --- a/src/northbridge/intel/sandybridge/memmap.c +++ b/src/northbridge/intel/sandybridge/memmap.c @@ -13,25 +13,23 @@ #include <stddef.h> #include <stdint.h> -static uintptr_t smm_region_start(void) +static uintptr_t northbridge_get_tseg_base(void) { - /* Base of TSEG is top of usable DRAM */ - return pci_read_config32(HOST_BRIDGE, TSEGMB); + /* TSEG has 1 MiB granularity, and bit 0 is a lock */ + return ALIGN_DOWN(pci_read_config32(HOST_BRIDGE, TSEGMB), 1 * MiB); } -void *cbmem_top_chipset(void) +static size_t northbridge_get_tseg_size(void) { - return (void *)smm_region_start(); + return CONFIG_SMM_TSEG_SIZE; } -static uintptr_t northbridge_get_tseg_base(void) +void *cbmem_top_chipset(void) { - return ALIGN_DOWN(smm_region_start(), 1 * MiB); -} + /* If DPR is disabled, base of TSEG is top of usable DRAM */ + uintptr_t top_of_ram = northbridge_get_tseg_base(); -static size_t northbridge_get_tseg_size(void) -{ - return CONFIG_SMM_TSEG_SIZE; + return (void *)top_of_ram; } void smm_region(uintptr_t *start, size_t *size) |