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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-09-02 09:00:45 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-09-07 19:43:21 +0000 |
| commit | c2418552407fee39965ecd6dbad52cb39c76b656 (patch) | |
| tree | b1206ae6938f90a6aee3a102073a10b3e0ede24c /src/northbridge/intel/sandybridge | |
| parent | 2c482a969a546a70c2787d4d96d1ac212da11eff (diff) | |
| download | coreboot-c2418552407fee39965ecd6dbad52cb39c76b656.tar.xz | |
north/intel/sandybridge: Fix native VGA initialization
Native VGA init no longer compiles from commit:
* 7dbf9c6 edid: Use edid_mode struct to reduce redundancy
Change-Id: I51a4f4874ce77178cab96651eb7caf2edd862aa2
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11491
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index bbc9882368..266883ec24 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -128,6 +128,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, int i; u8 edid_data[128]; struct edid edid; + struct edid_mode *mode; u32 hactive, vactive, right_border, bottom_border; int hpolarity, vpolarity; u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch; @@ -184,27 +185,27 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, power_port(mmio); intel_gmbus_read_edid(mmio + PCH_GMBUS0, 3, 0x50, edid_data, 128); - decode_edid(edid_data, - sizeof(edid_data), &edid); + decode_edid(edid_data, sizeof(edid_data), &edid); + mode = &edid.mode; /* Disable screen memory to prevent garbage from appearing. */ vga_sr_write(1, vga_sr_read(1) | 0x20); hactive = edid.x_resolution; vactive = edid.y_resolution; - right_border = edid.hborder; - bottom_border = edid.vborder; - hpolarity = (edid.phsync == '-'); - vpolarity = (edid.pvsync == '-'); - vsync = edid.vspw; - hsync = edid.hspw; - vblank = edid.vbl; - hblank = edid.hbl; - hfront_porch = edid.hso; - vfront_porch = edid.vso; - - target_frequency = info->lvds_dual_channel ? edid.pixel_clock - : (2 * edid.pixel_clock); + right_border = mode->hborder; + bottom_border = mode->vborder; + hpolarity = (mode->phsync == '-'); + vpolarity = (mode->pvsync == '-'); + vsync = mode->vspw; + hsync = mode->hspw; + vblank = mode->vbl; + hblank = mode->hbl; + hfront_porch = mode->hso; + vfront_porch = mode->vso; + + target_frequency = info->lvds_dual_channel ? mode->pixel_clock + : (2 * mode->pixel_clock); #if !IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) vga_textmode_init(); #else @@ -272,8 +273,8 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, return 0; } - link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency; - data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock) + link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency; + data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock) / (link_frequency * 8 * (info->lvds_num_lanes ? : 4)); printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", |