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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-11 21:56:37 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 18:06:27 +0000 |
commit | 7843bd560e65b0a83e99b42bdd58dd6363656c56 (patch) | |
tree | 0d411ba99ae94da46d3fccaf09f1208fc812bb6f /src/northbridge/intel/x4x/Kconfig | |
parent | c583920a748fb8bd7999142433ad08641b06283d (diff) | |
download | coreboot-7843bd560e65b0a83e99b42bdd58dd6363656c56.tar.xz |
nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK
There is some overlap between things done in bootblock
and romstage like setting BARs.
Change-Id: Icd1de34c3b5c0f36f2a5249116d1829ee3956f38
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36759
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/x4x/Kconfig')
-rw-r--r-- | src/northbridge/intel/x4x/Kconfig | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 8f002c6a8f..2a54e2495e 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -26,15 +26,12 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select PARALLEL_MP + select C_ENVIRONMENT_BOOTBLOCK config CBFS_SIZE hex default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX -config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/intel/x4x/bootblock.c" - config VGA_BIOS_ID string default "8086,2e32" |