diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-09 01:58:24 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2017-03-21 20:11:15 +0100 |
commit | 70a1dda927951e3d3a163ee899f25420f78b56c1 (patch) | |
tree | c8d9fd3e604526c405d462579654a2901ff40cd1 /src/northbridge/intel/x4x/bootblock.c | |
parent | 98adaf5989845f7859054f5cee2cf1f4e0392640 (diff) | |
download | coreboot-70a1dda927951e3d3a163ee899f25420f78b56c1.tar.xz |
nb/intel/x4x: Fix issues found by checkpatch.pl
Change-Id: Ie22b8bd5420f8c33df1866410af42ef41ad38362
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18694
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/x4x/bootblock.c')
-rw-r--r-- | src/northbridge/intel/x4x/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index 832fa7b8ec..9629d887c2 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -26,5 +26,5 @@ static void bootblock_northbridge_init(void) reg32 = TPM32(0); reg32 = CONFIG_MMCONF_BASE_ADDRESS | 16 | 1; - pci_io_write_config32(PCI_DEV(0,0,0), D0F0_PCIEXBAR_LO, reg32); + pci_io_write_config32(PCI_DEV(0, 0, 0), D0F0_PCIEXBAR_LO, reg32); } |