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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-30 17:36:31 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-04 09:31:26 +0200 |
| commit | 8565c03caf6ea505e3542be01a2cc9b532449728 (patch) | |
| tree | c6dcc20995e5577f072392c96566a9571168dde4 /src/northbridge/intel/x4x/raminit.c | |
| parent | eae521f9136aff255fa71712c0a145cdfcea358d (diff) | |
| download | coreboot-8565c03caf6ea505e3542be01a2cc9b532449728.tar.xz | |
nb/intel/x4x/raminit: Change reset type on incomplete raminit reset
The checkreset() function checks if raminit previously
succeeded (pmcon2 bit7 == 0). If this is not the case it will issue a
hot reset (writing 0x6 to 0xcf9). On the next attempt to boot the
system BOOT_PATH_RESET path will be taken. This boot path can only
successfully initialize memory if the system was reset from a state
where raminit succeeded, which is not the case here.
This can be fixed by issuing a cold reset instead of a hot reset.
Change-Id: Idbcf034c3777a64cc3fb92dc603d10470a6c8cb6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/x4x/raminit.c')
| -rw-r--r-- | src/northbridge/intel/x4x/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 7d352f11d3..f852181d4a 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -330,7 +330,7 @@ static void checkreset_ddr2(int boot_path) pci_write_config8(PCI_DEV(0, 0, 0), 0xf0, reg8 | (1 << 2)); printk(BIOS_DEBUG, "Reset...\n"); - outb(0x6, 0xcf9); + outb(0xe, 0xcf9); asm ("hlt"); } pmcon2 |= 0x80; |