diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-25 19:55:52 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-05-24 13:05:32 +0000 |
commit | 0d284959dcaf16416ce27b480339144fd6068bfe (patch) | |
tree | 5add4dd81fba292a6ef487ef2d1980e6b53c0e19 /src/northbridge/intel/x4x/raminit_ddr23.c | |
parent | 3fa103a60261a3cd1925858a317dc1ffa89797f7 (diff) | |
download | coreboot-0d284959dcaf16416ce27b480339144fd6068bfe.tar.xz |
nb/intel/x4x: Adapt post JEDEC for DDR3
Change-Id: I708f98dc2f36af73bb5933d186b4984649e149a1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/x4x/raminit_ddr23.c')
-rw-r--r-- | src/northbridge/intel/x4x/raminit_ddr23.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index cbec4acf9f..4dbee329f6 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -2109,10 +2109,21 @@ void do_raminit(struct sysinfo *s, int fast_boot) // After JEDEC reset MCHBAR8(0x40) = MCHBAR8(0x40) & ~0x2; FOR_EACH_POPULATED_CHANNEL(s->dimms, ch) { - if (s->selected_timings.mem_clk == MEM_CLOCK_667MHz) - reg32 = (2 << 18) | (3 << 13) | (5 << 8); - else - reg32 = (2 << 18) | (3 << 13) | (4 << 8); + reg32 = (2 << 18); + reg32 |= post_jedec_tab[s->selected_timings.fsb_clk] + [s->selected_timings.mem_clk - MEM_CLOCK_667MHz][0] + << 13; + if (s->selected_timings.mem_clk == MEM_CLOCK_667MHz && + s->selected_timings.fsb_clk == FSB_CLOCK_1066MHz && + ch == 1) { + reg32 |= (post_jedec_tab[s->selected_timings.fsb_clk] + [s->selected_timings.mem_clk - MEM_CLOCK_667MHz][1] + - 1) << 8; + } else { + reg32 |= post_jedec_tab[s->selected_timings.fsb_clk] + [s->selected_timings.mem_clk - MEM_CLOCK_667MHz][1] + << 8; + } MCHBAR32(0x400*ch + 0x274) = (MCHBAR32(0x400*ch + 0x274) & ~0xfff00) | reg32; MCHBAR8(0x400*ch + 0x274) = MCHBAR8(0x400*ch + 0x274) & ~0x80; MCHBAR8(0x400*ch + 0x26c) = MCHBAR8(0x400*ch + 0x26c) | 1; |