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author | Arthur Heymans <arthur@aheymans.xyz> | 2017-05-15 10:26:29 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-14 07:41:29 +0000 |
commit | 7a3a319e3ac56853468f7787cf25f9bba6b261d3 (patch) | |
tree | 3a4d7861e8c48b0b06de4db486a1a663909715f2 /src/northbridge/intel/x4x/x4x.h | |
parent | 840c27ecfccc1cdb75ae2d0c11da54efb8c5676a (diff) | |
download | coreboot-7a3a319e3ac56853468f7787cf25f9bba6b261d3.tar.xz |
nb/intel/x4x/raminit: Make programming launch ddr3 specific
Adds nmode to the sysinfo struct as it is needed later on.
Change-Id: Ia2ca4a200a1c813b2133eb1004fbe248fa3de9ce
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19872
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/x4x/x4x.h')
-rw-r--r-- | src/northbridge/intel/x4x/x4x.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index f3b910f814..8532d60ed2 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -338,6 +338,7 @@ struct sysinfo { struct rt_dqs_setting rt_dqs[TOTAL_CHANNELS][TOTAL_BYTELANES]; struct dll_setting dqs_settings[TOTAL_CHANNELS][TOTAL_BYTELANES]; struct dll_setting dq_settings[TOTAL_CHANNELS][TOTAL_BYTELANES]; + u8 nmode; }; #define BOOT_PATH_NORMAL 0 #define BOOT_PATH_WARM_RESET 1 |