diff options
author | Damien Zammit <damien@zamaudio.com> | 2016-01-22 19:11:05 +1100 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-01-29 00:18:58 +0100 |
commit | fe9876a7631c7982fccf38692dbed955e229f47b (patch) | |
tree | 7937ae57aa91c923976a711eae96416d316c64a3 /src/northbridge/intel/x4x/x4x.h | |
parent | 9fb08f55a86467ba1a36d4f5e6196a77b534778d (diff) | |
download | coreboot-fe9876a7631c7982fccf38692dbed955e229f47b.tar.xz |
nb/intel/x4x: Tidy up northbridge
- Add device enable macros
- Set the PMBASE correctly through southbridge device
Change-Id: I1b8cc3de96b1ecaf01e31bad8fba1fada8671c2d
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13126
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/intel/x4x/x4x.h')
-rw-r--r-- | src/northbridge/intel/x4x/x4x.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index c2269504a1..e1ef745867 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -27,11 +27,20 @@ #define D0F0_MCHBAR_HI 0x4c #define D0F0_GGC 0x52 #define D0F0_DEVEN 0x54 +#define D0EN (1 << 0) +#define D1EN (1 << 1) +#define IGD0EN (1 << 3) +#define IGD1EN (1 << 4) +#define D3F0EN (1 << 6) +#define D3F1EN (1 << 7) +#define D3F2EN (1 << 8) +#define D3F3EN (1 << 9) +#define PEG1EN (1 << 13) +#define BOARD_DEVEN (D0EN | D1EN | IGD0EN | IGD1EN) #define D0F0_PCIEXBAR_LO 0x60 #define D0F0_PCIEXBAR_HI 0x64 #define D0F0_DMIBAR_LO 0x68 #define D0F0_DMIBAR_HI 0x6c -#define D0F0_PMBASE 0x78 #define D0F0_PAM(x) (0x90+(x)) /* 0-6*/ #define D0F0_REMAPBASE 0x98 #define D0F0_REMAPLIMIT 0x9a |