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| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-06-11 15:23:23 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-17 16:04:42 +0000 |
| commit | 5033d6ce51cbc5113c061acb7852d736931edb8d (patch) | |
| tree | 97c78ec5872aa43f3182f3d3019a4679d2651a28 /src/northbridge/intel/x4x | |
| parent | 3c19382367f548d63fe2948b094e05c44d232039 (diff) | |
| download | coreboot-5033d6ce51cbc5113c061acb7852d736931edb8d.tar.xz | |
nb/intel/x4x: Die on invalid memory speeds
The speed argument should be one of the six values from the mem_clock
enum, so something is very wrong if this is not the case. Better to
die now than return 0, which will cause a division-by-zero error
later on where this function is called. The first two speeds are also
unsupported and have the same problem with returning 0, so die on those
as well.
Change-Id: Ib628c0eed3d6571bdde1df27ae213ca0691ec256
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1391088
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33409
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/x4x')
| -rw-r--r-- | src/northbridge/intel/x4x/raminit_ddr23.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 32618e8c88..1e40b9c511 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -41,8 +41,8 @@ u32 ddr_to_mhz(u32 speed) { static const u16 mhz[] = { 0, 0, 667, 800, 1067, 1333 }; - if (speed >= ARRAY_SIZE(mhz)) - return 0; + if (speed <= 1 || speed >= ARRAY_SIZE(mhz)) + die("RAM init: invalid memory speed %u\n", speed); return mhz[speed]; } |