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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-05 07:54:28 +0200
committerNico Huber <nico.h@gmx.de>2019-03-06 11:54:17 +0000
commit503d3247e48d803ce36e98d2064cf22220bb0dfd (patch)
treef50d79bf985fdcf6489178ffdc9918d1f0759183 /src/northbridge/intel/x4x
parente079e5ccc2e707e5b6bd3b011e04c9138f159808 (diff)
downloadcoreboot-503d3247e48d803ce36e98d2064cf22220bb0dfd.tar.xz
Remove DEFAULT_PCIEXBAR alias
The other DEFAULT_ entries are just immediate constants. Change-Id: Iebf4266810b8210cebabc814bba2776638d9b74d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/acpi/x4x.asl2
-rw-r--r--src/northbridge/intel/x4x/iomap.h3
2 files changed, 1 insertions, 4 deletions
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl
index 7724d8ee0f..8458db3df2 100644
--- a/src/northbridge/intel/x4x/acpi/x4x.asl
+++ b/src/northbridge/intel/x4x/acpi/x4x.asl
@@ -29,7 +29,7 @@ Device (PDRC)
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
- Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
+ Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000)
Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH
diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/iomap.h
index db608c5308..0d5ab64ec1 100644
--- a/src/northbridge/intel/x4x/iomap.h
+++ b/src/northbridge/intel/x4x/iomap.h
@@ -17,9 +17,6 @@
#ifndef X4X_IOMAP_H
#define X4X_IOMAP_H
-/* 4 KB per PCIe device */
-#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
-
#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */
#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */