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| author | Martin Roth <martinroth@google.com> | 2016-07-29 14:07:30 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-08-01 21:44:45 +0200 |
| commit | 0cd338e6e489eacfedb8fab3ff161b1578d08f07 (patch) | |
| tree | 8b729260de5a406dc22869ff5c5236ba77fbb0ed /src/northbridge/intel | |
| parent | bb9722bd775d575401edff14a9b80406ecbd974a (diff) | |
| download | coreboot-0cd338e6e489eacfedb8fab3ff161b1578d08f07.tar.xz | |
Remove non-ascii & unprintable characters
These non-ascii & unprintable characters aren't needed.
Change-Id: I129f729f66d6a692de729d76971f7deb7a19c254
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15977
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/e7505/raminit.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/gm45/pcie.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i82830/smihandler.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/report_platform.c | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index b48328f1b7..7734ca50d1 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -1007,10 +1007,10 @@ static inline void __attribute__((always_inline)) unsigned int a1, a2; asm volatile("movd %%xmm2, %%eax;" : "=a" (a1) ::); asm volatile("movd %%xmm3, %%eax;" : "=a" (a2) ::); - printk(BIOS_DEBUG, "return EIP @ %x = %x\n", a1, a2); + printk(BIOS_DEBUG, "return EIP @ %x = %x\n", a1, a2); asm volatile("movd %%xmm0, %%eax;" : "=a" (a1) ::); asm volatile("movd %%xmm1, %%eax;" : "=a" (a2) ::); - printk(BIOS_DEBUG, "return EIP @ %x = %x\n", a1, a2); + printk(BIOS_DEBUG, "return EIP @ %x = %x\n", a1, a2); #endif } diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c index 30ceb364e6..cc1fde74f8 100644 --- a/src/northbridge/intel/gm45/pcie.c +++ b/src/northbridge/intel/gm45/pcie.c @@ -289,7 +289,7 @@ static void setup_aspm(const stepping_t stepping, const int peg_enabled) * Maybe we just have to advertise ASPM through LCAP[11:10] * (LCAP[17:15] == 010b is the default, will be locked, as it's R/WO), * set 0x208[31:24,23:22] to zero, 0x224[24:21] = 1 and let the - * generic ASPM code do the rest? – Nico + * generic ASPM code do the rest? - Nico */ /* TODO: Prepare PEG for ASPM. */ } diff --git a/src/northbridge/intel/i82830/smihandler.c b/src/northbridge/intel/i82830/smihandler.c index 12da69830e..667f874c42 100644 --- a/src/northbridge/intel/i82830/smihandler.c +++ b/src/northbridge/intel/i82830/smihandler.c @@ -166,11 +166,11 @@ static void mbi_call(u8 subf, banner_id_t *banner_id) } case 0x0002: printk(BIOS_DEBUG, "|- MBI_Attach\n"); - printk(BIOS_DEBUG, "| |- Not Implemented!\n"); + printk(BIOS_DEBUG, "| |- Not Implemented!\n"); break; case 0x0003: printk(BIOS_DEBUG, "|- MBI_Detach\n"); - printk(BIOS_DEBUG, "| |- Not Implemented!\n"); + printk(BIOS_DEBUG, "| |- Not Implemented!\n"); break; case 0x0201: { obj_header_t *obj_header = (obj_header_t *)banner_id; diff --git a/src/northbridge/intel/sandybridge/report_platform.c b/src/northbridge/intel/sandybridge/report_platform.c index aa758c8626..39bff65b8b 100644 --- a/src/northbridge/intel/sandybridge/report_platform.c +++ b/src/northbridge/intel/sandybridge/report_platform.c @@ -62,7 +62,7 @@ static struct { /* 6-series PCI ids from * Intel® 6 Series Chipset and * Intel® C200 Series Chipset - * Specification Update – NDA + * Specification Update - NDA * October 2013 * CDI / IBP#: 440377 */ |