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| author | Ronald G. Minnich <rminnich@gmail.com> | 2013-04-05 13:35:29 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-04-06 08:17:46 +0200 |
| commit | 161ccc76ea0f8941a34c5bed323cc9ba1fe0221d (patch) | |
| tree | 15c60de0b838bf8a583f1a56f59012b5291636e8 /src/northbridge/intel | |
| parent | 6ccb1abfd4aff94711b9950f75b0eb6758c4f4d1 (diff) | |
| download | coreboot-161ccc76ea0f8941a34c5bed323cc9ba1fe0221d.tar.xz | |
exynos5250: add a chip.h file for the display register settings
Display hardware is part of this SOC, and we need to be able
to set certain variables in devicetree.cb. This chip file
contains the initial things we think we need to set.
Change-Id: I16f2d4228c87116dbeb53a3c9f3f359a6444f552
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/3031
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions