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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-02 14:38:13 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-07 13:04:58 +0100
commit27198ac2e3efaf45177909d35d1dab5f82c114fd (patch)
tree669a39290ac111ec46724c302f9cbc2924860a27 /src/northbridge/intel
parente25b5ef39fd10e48e87e0c4770a721a786e36a36 (diff)
downloadcoreboot-27198ac2e3efaf45177909d35d1dab5f82c114fd.tar.xz
MMCONF_SUPPORT: Drop redundant logging
Resource is actually stored even before read_resources, but that's where we currently log this resource. For Intel, use PCI config register offset as the resource index, while AMD side uses MSR address. Change-Id: I6eeef1883c5d1ee5bbcebd1731c0e356af3fd781 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17696 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/fsp_sandybridge/northbridge.c19
-rw-r--r--src/northbridge/intel/i3100/northbridge.c15
-rw-r--r--src/northbridge/intel/i945/northbridge.c19
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c19
4 files changed, 8 insertions, 64 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index c9f6e1c061..92a4365d46 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -244,28 +244,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
- /* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
- struct resource *resource = new_resource(dev, 0xcf);
+ struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
-static void mc_set_resources(device_t dev)
-{
- struct resource *resource;
-
- /* Report the PCIe BAR */
- resource = find_resource(dev, 0xcf);
- if (resource) {
- report_resource_stored(dev, resource, "<mmconfig>");
- }
-
- /* And call the normal set_resources */
- pci_dev_set_resources(dev);
-}
-
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@@ -319,7 +304,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
- .set_resources = mc_set_resources,
+ .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
.scan_bus = 0,
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 4549f85f4f..d5eb8a6493 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -138,18 +138,7 @@ static void mc_read_resources(device_t dev)
{
pci_dev_read_resources(dev);
- mmconf_resource(dev, 0xcf);
-}
-
-static void mc_set_resources(device_t dev)
-{
- struct resource *resource;
-
- resource = find_resource(dev, 0xcf);
- if (resource) {
- report_resource_stored(dev, resource, "<mmconfig>");
- }
- pci_dev_set_resources(dev);
+ mmconf_resource(dev, EXPECBASE);
}
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -188,7 +177,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
- .set_resources = mc_set_resources,
+ .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = 0,
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index c027bece88..6226a6382a 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -157,28 +157,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
- /* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
- struct resource *resource = new_resource(dev, 0xcf);
+ struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
-static void mc_set_resources(device_t dev)
-{
- struct resource *resource;
-
- /* Report the PCIe BAR */
- resource = find_resource(dev, 0xcf);
- if (resource) {
- report_resource_stored(dev, resource, "<mmconfig>");
- }
-
- /* And call the normal set_resources */
- pci_dev_set_resources(dev);
-}
-
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@@ -216,7 +201,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
- .set_resources = mc_set_resources,
+ .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt_generator = generate_cpu_entries,
#if CONFIG_HAVE_ACPI_RESUME
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 7f7c842324..71dd802614 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -264,28 +264,13 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
- /* We use 0xcf as an unused index for our PCIe bar so that we find it again */
buses = get_pcie_bar(&pcie_config_base);
if (buses) {
- struct resource *resource = new_resource(dev, 0xcf);
+ struct resource *resource = new_resource(dev, PCIEXBAR);
mmconf_resource_init(resource, pcie_config_base, buses);
}
}
-static void mc_set_resources(device_t dev)
-{
- struct resource *resource;
-
- /* Report the PCIe BAR */
- resource = find_resource(dev, 0xcf);
- if (resource) {
- report_resource_stored(dev, resource, "<mmconfig>");
- }
-
- /* And call the normal set_resources */
- pci_dev_set_resources(dev);
-}
-
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@@ -474,7 +459,7 @@ static struct pci_operations intel_pci_ops = {
static struct device_operations mc_ops = {
.read_resources = mc_read_resources,
- .set_resources = mc_set_resources,
+ .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
.scan_bus = 0,