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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 03:24:41 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-08 22:07:10 +0000
commit7c71f7d15b4d5e11d420539cd713e3f10d531569 (patch)
treec7b39f46fd9d2d1a164dd40aa36c583c52b06ab9 /src/northbridge/intel
parent0b5673dd33f73990be793c897de859cadd9e44b0 (diff)
downloadcoreboot-7c71f7d15b4d5e11d420539cd713e3f10d531569.tar.xz
nb/intel/x4x/acpi: Use ASL 2.0 syntax
Tested with BUILD_TIMELESS=1, Asus P5QL PRO does not change. Change-Id: I089f14dce6e3fdebcfdee126a2023ef028a01805 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/x4x/acpi/hostbridge.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl
index d96a7d58b7..2a8a137726 100644
--- a/src/northbridge/intel/x4x/acpi/hostbridge.asl
+++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl
@@ -208,8 +208,8 @@ Method (_CRS, 0, Serialized)
* Enter actual TOLUD. The TOLUD register contains bits 20-31 of
* the top of memory address.
*/
- ShiftLeft (^MCHC.TLUD, 20, PMIN)
- Add(Subtract(PMAX, PMIN), 1, PLEN)
+ PMIN = ^MCHC.TLUD << 20
+ PLEN = PMAX - PMIN + 1
Return (MCRS)
}